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STA530
4 X 50W STEREO
s
POWER AMPLIFIER
s
s s s s s s s
MONOCHIP BRIDGE QUAD CONFIGURABLE AMPLIFIER OPTIMIZED FOR BASH(R) ARCHITECTURE 4 X 50W OUTPUT POWER @ RL = 8 , THD = 10% or (2 x 50W @ 8 + 1 x 100W @ 4) or (2 x 100W @ 4 ) PRECISION RECTIFIERS TO DRIVE THE BUCK REGULATOR ON-OFF SEQUENCE/ TIMER WITH MUTE AND STANDBY PROPORTIONAL OVER POWER OUTPUT CURRENT TO LIMIT THE BUCK REGULATOR ABSOLUTE POWER BRIDGE OUTPUT TRANSISTOR POWER PROTECTION ABSOLUTE OUTPUT CURRENT LIMIT INTEGRATED THERMAL PROTECTION POWER SUPPLY OVER VOLTAGE
FLEXIWATT27
s s
PROTECTION FLEXIWATT POWER PACKAGE WITH 27 PIN BASH(R) LICENCE REQUIRED
DESCRIPTION The STA530 is a BASH(R) power amplifier where BASH(R) means "High Efficiency".
BLOCK DIAGRAM
GND +VS -VS PWR_INP1 STBY/MUTE PWR_INP3
CD+1&2 OUT1+ OUT1CD-1&2 PROT -1 OUTPUT BRIDGE +10
TURN-ON/OFF SEQUENCE
CD+3&4 +10 -1 OUTPUT BRIDGE OUT3+ OUT3CD-3&4
PROTECTION
SOA DETECTOR
CONFIG.
OUT2+ OUT2-1
+10
+10 -1 OUTPUT BRIDGE ABSOLUTE VALUE BLOCK
OUT4+ OUT4-
OUTPUT BRIDGE ABSOLUTE VALUE BLOCK
TRK_2/PAR1&2
TRK_4/PAR3&4
TRK_1
ABSOLUTE VALUE BLOCK
ABSOLUTE VALUE BLOCK
TRK_3
PWR_INP2
TRK_OUT
PWR_INP4
D02AU1344
July 2003
1/17
STA530
DESCRIPTION (continued) In fact it's permits to build a BASH(R) architecture amplifier adding only few external components and a variable Buck regulator tracking the audio signal. Notice that normally only one Buck regulator is used to supply a multichannel amplifiers system , therefore most of the functions implemented in the circuit have a summing output pin. The signal circuits are biased by fixed negative and positive voltages referred to Ground. Instead the final stages of the output amplifiers are supplied by two external voltages that are following the audio signal . In this way the headroom for the output transistors is kept at minimum level to obtain a high efficiency power amplifier. The circuit contains all the blocks to build a configurable four channel amplifier. The tracking signal for the external Buck regulator is generated from the Absolute Value Block (AVB) that rectifies the audio signal. The outputs of these blocks are decoupled by a diode to permit an easy sum of this signal for the multichannel application. The gain of the stage AVB is equal to 70 (+36.9 dB). A sophisticated circuit performs the output transistor power detector that , with the buck regulator, reduces the power supply voltage . Moreover, a maximum current output limiting and the over temperature sensor have been added to protect the circuit itself. The external voltage applied to the STBY/MUTE pin forces the two amplifiers in the proper condition to guarantee a silent turn-on and turn-off. ABSOLUTE MAXIMUM RATINGS
Symbol +Vs -Vs VCD+ VCDVCDVPWR_Imp1 VPWR_Imp2 VTRK_1 VTRK_2 Parameter Positive supply voltage referred to pin 14 (GND) Negative supply voltage referred to pin 14 (GND) Positive supply voltage tracking rail referred to pin 14 (GND) Negative supply voltage referred to -Vs (1) Negative supply voltage tracking rail referred to pin 14 (GND) Pin 11, 10, 9, 8 Negative & Positive maximum voltage referred to GND (pin 14) Value 27 -27 20 -0.3 -20 -25 to +25 Unit V V V V V V
VPWR_Imp 3 Pin 17, 18, 19, 20 Negative & Positive maximum voltage referred VPWR_Imp 4 to GND (pin 14) VTRK_3 VTRK_4 ISTBY-max VSTBY/
MUTE
-25 to +25
V
Pin 12 maximum input current (Internal voltage clamp at 5V) Pin 12 negative maximum voltage referred to GND (pin 14)
500 -0.5
A V
Notes: 1. VCD- must not be more negative than -Vs
THERMAL DATA
Symbol Tj Max Junction temperature Parameter Value 150 1 Unit C C/W
Rth j_case Thermal Resistance Junction to case .............................. ..max
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STA530
OPERATING RANGE
Symbol +Vs -Vs Vs+ VCD+ VCDTamb Isb_max Positive supply voltage Negative supply voltage Delta positive supply voltage Positive supply voltage tracking rail Negative supply voltage tracking rail Ambient Temperature Range Pin 12 maximum input current (Internal voltage clamp at 5V) Parameter Value +15 to +25 -15 to -25 5V (Vs+ - VCD+) 10V +3 to +15 -15 to -3 0 to 70 200 Unit V V V V V C A
PIN CONNECTION
1
27
-Vs
Out1+
Out1-
CD+1&2
CD-1&2
Out2-
TRK_1
STBY/MUTE
+Vs
TRK_3
Out4-
CD-3&4
CD+3&4
Out2+
TRK_2/Par1&2
PWR_Inp2
PWR_Inp1
TRK_Out
PROT
PWR_Inp3
PWR_Inp4
TRK_4/Par3&4
Out4+
Out3-
Gnd
Out3+
D02AU1352
NOTE Slug connected to PINs No. 1 & 27
-Vs
3/17
STA530
PIN CONNECTION
N 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 Name -Vs Out1+ Out1CD+1&2 CD-1&2 Out2Out2+ TRK_2/ Par1&2 TRK_1 PWR_Inp2 PWR_Inp1 STBY/MUTE TRK_Out Gnd +Vs PROT PWR_Inp3 PWR_Inp4 TRK_3 TRK_4/ Par3&4 Out4+ Out4CD-3&4 CD+3&4 Out3Out3+ -Vs Negative Bias Supply Channel 1 speaker positive output Channel 1 speaker negative output Channels 1 & 2 Time varying tracking rail positive power supply Channels 1 &2 Time varying tracking rail negative power supply Channel 2 speaker negative output Channel 2 speaker positive output Absolute value block input for channel 2,and parallel command for channels 1&2 Absolute value block input for channel 1 Input to channel 2 power stage Input to channel 1 power stage Standby/mute input voltage control Absolute value block output Analog Ground Positive Bias Supply Channel Protection signal for STABP01 Input to channel 3 power stage Input to channel 4 power stage Absolute value block input for channel 3 Absolute value block input for channel 4,and parallel command for channels 3&4 Channel 4 speaker positive output Channel 4 speaker negative output Channels 3 & 4 Time varying tracking rail negative power supply Channels 3 & 4 Time varying tracking rail positive power supply Channel 3 speaker negative output Channel 3 speaker positive output Negative Bias Supply Description
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STA530
ELECTRICAL CHARACTERISTCS (Test Condition: Vs+ = 25V, Vs- = -25V, V CD+ = 15V, VCD- = -15V, RL = 8, external components at the nominal value f = 1KHz, Tamb = 25C unless otherwise specified)
Symbol Parameter Test Condition Min. Typ. Max. Unit
TRACKING PARAMETERS GTRK Tracking reference voltage gain 66 0 5 70 15 6 1 100 74 V mA M mV
VTRK_out Tracking ref. output voltage ITRK_out Current capability ZTRK_in Input impedance (TRK1/2)
VOFFSET Output traking DC offset OUTPUT BRIDGE Gout Gch Gch Pout Half Output bridge gain Output bridge differential gain Output bridges gain mismatch Continuous Output Power THD = 1% THD = 10% THD = 10% RL = 4 VCD+ = 11V, VCD- = -11V Pout 2 ch par THD Total harmonic distortion of the output bridge Output bridge D.C. offset Noise at Output bridge pins Input impedance Output power Rdson IO = 1A IO = 1A Tj=25o C f = 20Hz to 20KHz; Rg = 50 100 Continuous Output Power THD = 1% RL = 4 THD = 10% RL = 4 Po = 5W f = 20Hz to 20KHz; Po = 20W VOff EN Zbr_in Rdson -100 19 25 -1
20 26
21 27 1
dB dB dB W W W
39 50 40
78 100 0.01 0.1 0.2 100 60 140 400 800 100 6 8 180 500
W W % % mV V K m m dB MHz V/s
RdsonMAX Maximum Output power Rdson OLG GB SR Open Loop Voltage Gain Unity Gain Bandwidth Slew Rate
PROTECTION VSTBY VMUTE VPLAY Th1 Stby voltage range Mute voltage range Play voltage range First Over temperature threshold 0 1.6 4 130 0.8 2.5 5 V V V C
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STA530
ELECTRICAL CHARACTERISTCS (continued)
Symbol Th2 Unbal. Ground Unbal. Ground UVth Pd_reg. Pd_max Iprot Pd Iprot Id Ilct s Ilct h I+Vs Parameter Second Over temperature threshold Upper Unbalancing ground threshold Lower Unbalancing ground threshold Under voltage threshold Power dissipation threshold for system regulation Switch off power dissipation threshold Protection current slope Protection current slope Limiting Current threshold "soft" Limiting Current threshold "hard" Positive supply current Stby (Vstby/mute pin = 0V) Mute (Vstby/mute pin = 2.5V) Play (Vstby/mute pin = 5V no signal) Stby (Vstby/mute pin = 0V) Mute (Vstby/mute pin = 2.5V) Play (Vstby/mute pin = 5V no signal) Stby (Vstby/mute pin = 0V) Mute (Vstby/mute pin = 2.5V) Play (Vstby/mute pin = 5V no signal) Referred to (CD+ - CD-)/2 Referred to (CD+ - CD-)/2 |Vs+| + |Vs-| Iprot = 50A; @ Vds = 8V @ Vds = 8V for Pd > Pdreg for Id > Idreg 4 4.5 18 18 20 30 400 400 4.5 5 5 TBD TBD 6 29 33 200 85 85 200 85 85 5 5.5 Test Condition Min. Typ. 150 5 -5 22 23 Max. Unit C V V V W W A/W A/A A A mA mA mA mA mA mA A mA mA A mA mA
I-Vs
Negative supply current
ICD+
Positive traking rail supply current
ICD-
Negative traking rail supply current Stby (Vstby/mute pin = 0V) Mute (Vstby/mute pin = 2.5V) Play (Vstby/mute pin = 5V no signal)
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STA530
FUNCTIONAL DESCRIPTION The circuit contains all the blocks to build a configurable four channel amplifier. In fact, only driving properly the TRK_2 (and TRK_4) pins, it's possible to change the chip configuration: - 50 Watt x 4 - 50 Watt x 2 + 100 Watt x1 (TRK_2/Par1&2 or TRK_4/Par3&4 at -Vs) - 100 Watt x 2 (TRK_2/Par1&2 and TRK_4/Par3&4 at -Vs) Each single channel is based on the Output Bridge Power Amplifier, and its protection circuit. Moreover, a signal rectifier are added to complete the circuit. The operation modes are driven by The Turn-on/off sequence block. In fact the IC can be set in three states by the Stby/mute pin: STANDBY ( Vpin < 0.8V), MUTE (1.6V < Vpin < 2.5V), and PLAY (Vpin > 4V). In the Standby mode all the circuits involved in the signal path are uninhabited, instead in Mute mode the circuits are biased but the Speakers Outputs are forced to ground potential. These voltages can be get by the external RC network connected to Stby/Mute pin. The same block is used to force quickly the I.C. In standby mode or in mute mode when the I.C. dangerous condition has been detected. The RC network in these cases is used to delay the Normal operation restore. The protection of the I.C. are implemented by the Over Temperature, Unbalance Ground, Output Short circuit, Under voltage, and output transistor Power sensing as shown in the following table: Table 1. Protection Implementation
Fault Type Chip Over temperature Chip Over temperature Unbalancing Ground Over Current Condition Tj > 130 C Tj > 150 C |Vgnd| > ((CD+) (CD-))/2 + 5V Iout > 4.5A Protection strategy Mute Standby Standby Reducing Buck regulator output voltage. Standby Standby Reducing Buck regulator output voltage. Standby Fast Fast Fast Related to the Buck regulator Fast Fast Related to the Buck regulator Fast Action time Release time Slow Related to Turn_on sequence Slow, Related to Turn_on sequence Slow, Related to Turn_on sequence Related to the Buck regulator Slow, related to Turn_on sequence Slow, related to Turn_on sequence Related to the Buck regulator Slow, related to Turn_on sequence
Short circuit Under Voltage Extra power dissipation at output transistor Maximum power dissipation at output transistor
Iout > 5A |Vs+| + |Vs-|< 20V Pd tr. > 18W
Pd tr. > 30W
ABSOLUTE VALUE BLOCK The absolute value block rectifies the signal to extract the control voltage for the external Buck regulator. The output voltage swing is internally limited, the gain is internally fixed to 70. The input impedance of the rectifier is very high , to allow the appropriate filtering of the audio signal before the rectification.
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STA530
OUTPUT BRIDGE The Output bridge amplifier makes the single-ended to Differential conversion of the Audio signal using two power amplifiers, one in non-inverting configuration with gain equal to 10 and the other in inverting configuration with unity gain. To guarantee the high input impedance at the input pins, PWR_Inp1....4, the second amplifier stages are driven by the output of the first stages respectively. In 60W x2 channel configuration the "slave" inputs (INPUT 2/4) must be connected to GND. POWER PROTECTION To protect the output transistors of the power bridge a power detector is implemented (fig 1). The current flowing in the power bridge and the voltage drop on the relevant power (Vds) are internally measured. These two parameters are converted in current and multiplied: the resulting current , Ipd, is proportional to the instantaneous dissipated power on the relevant output transistor. The current Ipd is compared with the reference current Ipda, if bigger (dissipated power > 18W) a current, Iprot(PD), is supplied to the Protection pin. The aim of the current Iprot is to reduce the reference voltage for the Buck regulator supplying the power stage of the chip, and than to reduce the dissipated power. The response time of the system must be less than 200 Sec to have an effective protection. As further protection, when Ipd reaches an higher threshold (when the dissipated value is higher then 30W) the chip is shut down, forcing low the Stby/Mute pin, and the turn on sequence is restarted. The above description is relative for each channel in 4x30W configuration. Figure 1. Power Protection Block Diagram
OUT1p OPA
OUT1n OPA
CD-1&2
+
ILIMP I_pda IPROT(ID) I_pd
+
IPROT(PD)
IPROT
TO PROT PAD
V/I I_Pd MULTIPLIER
I_pdp
CURRENT COMP. SEQUENCE Pdp1 TO TURN-ON/OFF
x
I_pd
V/I RSENSE Iload CD+1&2
D02AU1346
Ilim
CURRENT COMP. Oc1 SEQUENCE TO TURN-ON/OFF
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STA530
In fig. 2 there is the power protection strategy pictures. Under the curve of the 18W power, the chip is in normal operation, over 30W the chip is forced in Standby. This last status would be reached if the Buck regulator does not respond quikly enough reducing the stress to less than 30W. The fig.3 gives the protection current, Iprot(PD), behavior. The current sourced by the pin Prot follows the formula: ( P d - P d_ av _th ) 5 10 I p ro t ( P D) -----------------------------------------------------------------1.25 V (for each channel) for Pd < Pd_av_th the Iprot(PD)= 0. Figure 2. Power protection threshold
Ids(A) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0
-4
CURRENT PROTECTION The chip is also protected by a current detection. The current ILOAD is compared with the reference current ILIMP, if bigger (ILOAD> 4,5 A)a current Iprot(IL), is supplied to the Protection pin. As further protection, when ILOAD reaches an higher threshold (5 A) the chip is shut down, forcing low the Stby/Mute pin, and the turn on sequence is restarted. The above description is relative for each channel in 4x30W configuration. The fig.4 gives the protection current, Iprot(IL), behavior. The current sourced by the pin Prot follows the formula: ( I L O AD - I ict, s ) I p ro t ( IL ) --------------------------------------- (for each channel) 2500 for IlLOAD < Iict,s the Iprot(IL) = 0. For the parallel channel Iprot is double.
Ilim=4.5A
The chip is also shut down in the following conditions: When the average junction temperature of the chip reaches 150C.
Standby
Pd_Max=30W
When the ground potential differ from more than 5V from the half of the power supply voltage, ((CD+)(CD-))/2 When the sum of the supply voltage |Vs+| + |Vs-| <20V
Vds(V)
Normal Operation
7.5
Figure 3. Protection current behaviour Iprot (P D)
Iprot(IL)(A)
Iprot (IPd) (mA)
k Buc
m
Li
it a
ti o
Pd_reg=18W
n
15.0 22.5 30.0 37.5
D02AU1366
The output bridge is muted when the average junction temperature reaches 130C. Figure 4. Protection current behaviour Iprot (IL)
20
Iprot slope = 0.4 mA/W 10
800 400
Iprot slope=400A/A 4.5A 5A
Id(A)
:
Pd (W) 5 10 15 20 25 30
D02AU1367
1
2
3
4
5
6
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STA530
Figure 5. Test and Application Circuit (4x50W)
C9 INPUT 1 R1 C5 C1 R9 PWR_INP1 C11 INPUT 2 R7 C7 C3 8
R5
TRK_1
TRK_2/PAR1&2 R11 PWR_INP2 OUT1P
R3
CD+1&2 CD+3&4
C13
R13
OUT1M OUT2P
+VS C15 C17 GND
OUT2M STBY/MUTE
8
C14
R14
C16
C18 -VS
5V R18 R17 MUTE R19 STBY C19 8
D1
-VS CD-1&2 CD-3&4
OUT3P
OUT3M OUT4P
R15 R16 C12 INPUT 3 R8 C8 C4 R4
TRK_OUT PROT
OUT4M
8
TRK_3 R12 PWR_INP3
TRK_4/PAR3&4 R10 PWR_INP4
D02AU1347
R6 R2
C10 INPUT 4
C6 C2
Figure 6. Test and Application Circuit (2x50W & 1x100W)
C9 INPUT 1 R1 C5 C1 R9 PWR_INP1 PWR_INP2
R5
TRK_1
TRK_2/PAR1&2
-VS
CD+1&2 CD+3&4
OUT1P OUT2P 4
C13
R13
+VS C15 C17 GND
OUT2M OUT1M
C14
R14
C16
C18 -VS
STBY/MUTE R18 OUT3P 8 C19 MUTE R19 R17 STBY
5V
D1
-VS CD-1&2 CD-3&4
OUT3M OUT4P
R15 R16 C12 INPUT 3 R8 C8 C4 R4
TRK_OUT PROT
OUT4M
8
TRK_3 R12 PWR_INP3
TRK_4/PAR3&4 R10 PWR_INP4
D02AU1351
R6 R2
C10 INPUT 4
C6 C2
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STA530
EXTERNAL COMPONENTS
Name Function Value 10K 56K 100nF (fp = 16Hz, Rac =100K ) 10K 1nF 1F 10K 30K 30K 2.2F 100nF 330 , 1W 680nF 40K 1K 470 F , 63V SB360 1 Cac = -------------------------------2 fp Rac Formula Resistor for tracking input voltage R1 = R2 =R7 = R8 filter Resistor for tracking input voltage R5 = R6 =R3 = R4 filter Cac AC Decoupling capacitor C1 = C2 = C3 = C4 R9=R10=R11=R12 Resistor for tracking input voltage filter C5 = C6 = C7 = C8 Capacitor for Tracking input voltage filter C9=C10=C11=C12 Dc decoupling capacitor R17 R18 R19 C19 C17 = C18 R13 = R14 C13 = C14 R15 R16 C15 = C16 D1 Bias Resistor for Stby/Mute function Stby/Mute constant time resistor Mute resistor Capacitor for Stby/Mute resistor Power supply filter capacitor Centering resistor Tracking rail power supply filter TRK_out Protection Power supply filter capacitor Schottky diode
Figure 7. BASH(R) module SAM261 6.1 with 2 x STA530 (see Application Note AN1643)
+50VDC Signal Power Supply +/ -24V DC / mA 50
Dynamic Power Supply (CD+ & CD) Buck Regulator STA530 4 x 50Watts
AudioInputs
8 Ohm Loads
STABP01 Controller Lines of Controls STA530 1 x 100Watts 2 x 50Watts
BASH fi module SAM261
6.1
+/ -24V DC / mA 50 Signal Power Supply
4 Ohm Load
Power - On-Off sequences: In order to avoid damages to the SAM261 board it is important to follow these sequences: At Power-On apply in the first the Auxiliary Power Supply (24V) and after the Main Power Supply (+50V), in this condition the system is in "Mute state" and it can move in "play state" with the switch present on the pcb. At Power-Off is better to bring the SAM module in "Mute state" and after that to follow this order: switchoff the Main Supply Voltage (+50V) and subsequently the Auxiliary Power Supply. (24V).
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STA530
System Description & Operating Rules SAM261 is a BASH(R) 6.1 amplifier ( 6 x 50W, 1 x 100W) implementation utilizing the STA530 Integrated Circuit. Specifically designed for multi-channel implementation in DVD - HTIB systems, Multi-Media systems, Mini and Micro systems and Set Top boxes. SAM261 is dimensioned to provide the maximum Output Power (THD=10 %) on two channels and instantaneously and 1/3 max Pout on the remaining Outputs, or 1/8 of max Pout continuous; this rule is important to define the main Power Supply size (+50V). Buck Regulator Description The function of the buck regulator is to efficient convert efficiently an input voltage to a lower voltage by adjusting the ratio of the switching transistor's on-time to off-time. The resulting waveform is averaged by the output filter to recover an analog signal. In the BASH amplifier this output is in effect split in half by centering it on the audio ground to provide CD+ and CD- rails. To avoid the need for a high side driver for the transistor switch in the buck regulator the buck circuit recommended has the switch in the return path. Hence the gate drive circuit (part of the STPB01) is referenced to the negative return of the main supply that provides power for the buck regulator. Interfacing STA530 to STPB01 (Feedback circuit) This circuit produces a control signal current that is fed back to the STPB01 digital controller. The network used in this example compares the track signal (STA530 track out) to a fixed ratio of buck regulator's output (CD+) using a transistor. This method is effective because the controller's reference is the negative of the main DC supply, which is not referenced to audio ground. The tracking signal is generated inside the STA530 (track out) by taking the absolute value of the pre-amp's output. The outputs of each channel and of each STA530 are then tied together in a diode-oring arrangement. This means that the highest of any given output is the output that determines the tracking signal. The absolute value circuit inside the STA530 has gain. This makes it possible to use an RC network and a resistor divider to create a phase shift in the tracking signal at higher frequencies. This is also useful in optimizing the alignment of the buck regulator's output with the output signal of the bridge amplifier at high frequency This circuit first converts the buck switch current to a peak voltage. The control current is then converted to a voltage (using a resistor) and added to the peak voltage. By doing this, the buck is better able to maintain the desired headroom over a wide load range and output level. Centering Network for CD + & CD- Rails The power rail of a bridge amplifier has no current flowing through the ground node, as the load is not connected to ground. However there are several different small sources of dynamic and continuos ground currents flowing from either CD+ or CD- to support the function of various things such as the control signal to the STABP01 controller. The centering network prevents these currents from shifting the CD+/- rails away from center i.e. away from a symmetric split of the buck's output about ground. This is critical, even a small centering error requires an increase in headroom which results in a significant drop in output losses. In its simplest form the centering network could be a resistor divider from CD+ to CD- with its center tied to ground. As long as the impedance is low enough (for example 200) this will swamp the smaller offset currents. It is helpful to put this kind of passive network on the board with the STA530 devices to help when testing this board on its own. Power Amplifier Heatsink requirements The heatsink requirements are dependent on several design goals. However there are two common references: Pink noise at 1/8 of full power, all channels loaded. This would approximate a system with all channels reproducing music at full volume with clipping occurring only occasionally. The second would be full power at 1kHz for 5 minutes after a one hour pre-soak at 1/8 power. The worse of these two is the full power test. A conservative approach is to assume that the heatsink would come to thermal equilibrium after 5 minutes. Thus the Rth of the heatsink can be determined by:
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STA530
Tjmax - Tamb R th = ---------------------------------- - Rth -j Pd
c ase
- R th
cas e to heatsink
For example in the STA530 the Rth jc is 1C/W. R case-to-heatsink with grease is about 0.5 C/W. The maximum operating junction temperature is 130 C, which for margin should be derated to 120 C. Buck Regulator Heatsink The Buck regulator heatsink can be designed in a similar manner and does not change by varying power supply. In general the efficiency will be in the order of 85%. The thermal impedances from the junction(s) to the heatsink may be lower and the maximum operating temperature will be higher. Usually either the sub or the remaining channels are tested at full power. The result is that usually the Buck heatsink is about 1/4 the size of the linear heatsink, but this can be strongly affected by the design. Figure 8. PCBs AND COMPONENTS LAYOUT
4 Pins Harness Power Supply Connections 4 Supply Connections Main DC Input VS DC Input Mute
Audio Inputs
Preamplifier PCB
9 Pins Harness Audio Connections
Amplifier PCB
SAM261 Specification
Parameter Output Power THD + N SNR Sensitivity Crosstalk Main Power Supply Inputs Aux Power Supply Inputs Rating Sats @ 8 - 55 Watts @ 10% Sub @ 4 - 100 Watts @ 10% < 0.05% @ 40 Watts < 0.05% @ 75 Watts -102 dB (relative to full power) -110 dB (A-weighted) 1 VRMS -87dB (relative to10W) 50Volts @ 2 Amps + 24 Volts @ 100mA -24 Volts @ 100mA Notes See Graphs Measured @ 1KHZ Channel 5 terminated Amplifier Channel 5 @ 10W 1KHz 8, Channel 3 input terminated Maximum Voltage is 50Vdc Minimum Voltage is 40Vdc
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STA530
Figure 9. THD + N FR Channel
Audio Precision 10 5
Figure 12. THD + N LF Channel
Audio Precision 10 5
2 1 0.5 % 0.2 0.1 0.05
2 1 0.5 % 0.2 0.1 0.05
0.02 0.01
0.02 0.01 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95 100 105 110 115120 W
2.5 5
7.5 10 12.5 15 17.5 20 22.5 25 27.5 30 32.5 35 37.5 40 42.5 45 47.5 50 52.5 55 57.5 60 W
Figure 10. THD + N vs Frequency
Audio Precision 10 5
Figure 13. Frequency Response
Audio Precision +30 +29 +28 +27 +26 +25 +24 +23 +22 +21 +20 +19 +18 +17 +16 dBr+15 +14 +13 +12 +11 +10 +9 +8 +7 +6 +5 +4 +3 +2 +1 +0 10
2 1 0.5 % 0.2 0.1 Pout = 30W 0.05
0.02 Pout = 5W 0.01 20 50 100 200 500 Hz 1k 2k 5k 10k 20k
20
50
100
200
500 Hz
1k
2k
5k
10k
20k
40k
Figure 11. Residual Noise vs Freq - Relative to full power
Audio Precision +0 -10 -20 -30 -40 -50 -60 -70 dBr -80 -90 -100 -110 -120 -130 -140 -150 -160 20 50 100 200 500 Hz 1k 2k 5k 10k 20k
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STA530
Figure 14. Application Block Diagram
+VS -VS +VS -VS MUTE MUTE CONTROL MUTE-BUCK MUTE J1 MUTE IN1 RED CONNECTOR IN2 WHITE MUTE-BUCK TRACK PROT BUCK CONTROLLER CDCD+ J2 IN3 RED CONNECTOR IN4 WHITE CDCD+ 50W OUT1+ 50W OUT1OUT2+ 50W OUT2OUT3+ OUT3OUT4+ 50W OUT4TRACK PROT J4 J3 J2 J1
STA530
4 CHANNELS
S1
+VS -VS
+VS -VS DC++ GATE-DRIVE I-SENSE
1800pF DC++ L3 15H 1800pF -VS +VS J3 I-SENSE GATE-DRIVE DC++ 200W BUCK CD+ CDCD+ CDMUTE -VS +VS IN5 RED IN6 WHITE J4 IN7
D02AU1444
STA530
3 CHANNELS
PROT TRACK
OUT5+ 50W OUT5OUT6+ 50W OUT6OUT7+ 100W OUT7J7 J6 J5
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STA530
mm TYP. 4.50 1.90 1.40 0.90 0.39 1.00 26.00 29.23 17.00 12.80 0.80 22.47 18.97 15.70 7.85 5 3.5 4.00 4.00 2.20 2 1.70 0.5 0.3 1.25 0.50 inch TYP. 0.177 0.074 0.055 0.035 0.015 0.040 1.023 1.150 0.669 0.503 0.031 0.884 0.747 0.618 0.309 0.197 0.138 0.157 0.157 0.086 0.079 0.067 0.02 0.12 0.049 0.019
DIM. A B C D E F (1) G G1 H (2) H1 H2 H3 L (2) L1 L2 (2) L3 L4 L5 M M1 N O R R1 R2 R3 R4 V V1 V2 V3
MIN. 4.45 1.80 0.75 0.37 0.80 25.75 28.90
MAX. 4.65 2.00 1.05 0.42 0.57 1.20 26.25 29.30
MIN. 0.175 0.070 0.029 0.014 0.031 1.014 1.139
MAX. 0.183 0.079 0.041 0.016 0.022 0.047 1.033 1.153
OUTLINE AND MECHANICAL DATA
22.07 18.57 15.50 7.70
22.87 19.37 15.90 7.95
0.869 0.731 0.610 0.303
0.904 0.762 0.626 0.313
3.70 3.60
4.30 4.40
0.145 0.142
0.169 0.173
5 (Typ.) 3 (Typ.) 20 (Typ.) 45 (Typ.)
Flexiwatt27 (vertical)
(1): dam-bar protusion not included (2): molding protusion included
V C B V H H1 H3 H2 R3 R4 V1 R2 R L L1 A
V3
L4
O
L2
N
L3
V1
V2
R2 L5 G G1 F
R1 R1 R1 E
FLEX27ME
D
Pin 1
M
M1
7139011
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STA530
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (R) 2003 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com
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